| dc.contributor | RENE ARMANDO CUMPLIDO PARRA | |
| dc.contributor | LUIS VILLASEÑOR PINEDA | |
| dc.creator | OSVALDO NAVARRO GUZMAN | |
| dc.date | 2012 | |
| dc.date.accessioned | 2018-11-19T14:29:01Z | |
| dc.date.available | 2018-11-19T14:29:01Z | |
| dc.identifier | http://inaoe.repositorioinstitucional.mx/jspui/handle/1009/764 | |
| dc.identifier.uri | http://repositorioslatinoamericanos.uchile.cl/handle/2250/2258906 | |
| dc.description | Sequential Pattern Mining is a widely addressed problem in data mining, with
applications such as analyzing Web usage, automatic text reuse detection, analyzing
purchase behavior, among others. Nevertheless, with the dramatic increase
in data volume, the current approaches result inefficient when dealing with large
input datasets, a large number of different symbols and low minimum supports.
We propose a new sequential pattern mining algorithm, which follows a pattern growth
scheme to discover frequent patterns, that is, by recursively growing an
already known frequent pattern p using frequent symbols from the projected
database with respect to p. Our algorithm only maintains in memory a structure
of the pseudo-projections and the symbols required for the algorithm in case
it has to go back and try to grow a pattern with another valid element. Also,
we propose a hardware architecture that implements the processes of generating
pseudo-projection databases and finding frequent elements from a projection
database, which comprehends the most costly operations of our algorithm, in
order to accelerate its running time. Experimental results showed that our algorithm
has a better performance and scalability, in comparison with the UDDAG
and PLWAP algorithms. Moreover, a performance estimate showed us that our
hardware architecture significantly reduces the running time of our proposed algorithm.
To our knowledge, this is the first hardware architecture that tackles
the problem of sequential pattern mining. | |
| dc.format | application/pdf | |
| dc.language | eng | |
| dc.publisher | Instituto Nacional de Astrofísica, Óptica y Electrónica | |
| dc.relation | citation:Navarro-Guzman O. | |
| dc.rights | info:eu-repo/semantics/openAccess | |
| dc.rights | http://creativecommons.org/licenses/by-nc-nd/4.0 | |
| dc.subject | info:eu-repo/classification/Secuencias/Sequences | |
| dc.subject | info:eu-repo/classification/Minería de datos/Data mining | |
| dc.subject | info:eu-repo/classification/Reconocimiento de patrones/Pattern recognition | |
| dc.subject | info:eu-repo/classification/Códigos de hardware y software/Hardware-software codesign | |
| dc.subject | info:eu-repo/classification/cti/1 | |
| dc.subject | info:eu-repo/classification/cti/12 | |
| dc.subject | info:eu-repo/classification/cti/1203 | |
| dc.title | Algorithm and hardware architecture for the discovery of frequent sequences | |
| dc.type | Tesis | |
| dc.type | info:eu-repo/semantics/acceptedVersion | |
| dc.audience | students | |
| dc.audience | researchers | |
| dc.audience | generalPublic | |
