Artículos de revistas
Accelerating floating-point to fixed-point data type conversion with evolutionary algorithms
Fecha
2015-02Registro en:
Electronics Letters, Stevenage, UK : IET,v. 51, n. 3, p. 244-246, Fev. 2015
0013-5194
10.1049/el.2014.3791
v. 51, n. 3, p. 244-246, Fev. 2015
Autor
Rosa, Leandro de Souza
Toledo, Cláudio Fabiano Motta
Bonato, Vanderlei
Institución
Resumen
The choice of the data type representation has significant impacts on
the resource utilisation, maximum clock frequency and power consumption
of any hardware design. Although arithmetic hardware
units for the fixed-point format can improve performance and reduce
energy consumption, the process of tuning the right bit length is
known as a time-consuming task, since it is a combinatorial optimisation
problem guided by the accumulative arithmetic computation
error. A novel evolutionary approach to accelerate the process of converting
algorithms from the floating-point to fixed-point format is presented.
Results are demonstrated by converting three computingintensive
algorithms from the mobile robotic scenario, where data
error accumulated during execution is influenced by external factors,
such as sensor noise and navigation environment characteristics. The
proposed evolutionary algorithm accelerated the conversion process
by up to 2.5 × against the state-of-the-art methods, allowing even
further bit-length optimisations.