dc.creator | Bueno, Maikon Adiles Fernandez | |
dc.creator | Holanda, Jose Arnaldo Mascagni de | |
dc.creator | Pereira, Erinaldo da Silva | |
dc.creator | Marques, Eduardo | |
dc.date.accessioned | 2015-03-20T13:31:24Z | |
dc.date.accessioned | 2018-07-04T17:04:24Z | |
dc.date.available | 2015-03-20T13:31:24Z | |
dc.date.available | 2018-07-04T17:04:24Z | |
dc.date.created | 2015-03-20T13:31:24Z | |
dc.date.issued | 2014-08-20 | |
dc.identifier | IEEE International Conference on Embedded and Real-Time Computing Systems and Applications, 20th, 2014, Chongqing. | |
dc.identifier | 9781479939541 | |
dc.identifier | http://www.producao.usp.br/handle/BDPI/48567 | |
dc.identifier | http://dx.doi.org/10.1109/RTCSA.2014.6910514 | |
dc.identifier.uri | http://repositorioslatinoamericanos.uchile.cl/handle/2250/1644281 | |
dc.description.abstract | This paper aims at designing and implementing a
scheduler model for heterogeneous multiprocessor architectures
based on software and hardware. As a proof of concept, the
scheduler model was applied to the Linux operating system running
on the SPARe Leon3 processor. In this sense, performance
monitors have been implemented within the processors, which
identify demands of processes in real-time. For each process, its
demand is projected for the other processors in the architecture
and then, it is performed a balancing to maximize the total system
performance by distributing processes among processors. The
Hungarian maximization algorithm, used in balancing scheduler
was developed in hardware, and provides greater parallelism and
performance in the execution of the algorithm. The scheduler
has been validated through the parallel execution of several
benchmarks, resulting in decreased execution times compared
to the scheduler without the heterogeneity support. | |
dc.language | eng | |
dc.publisher | Chongqing University | |
dc.publisher | IEEE Computer Society | |
dc.publisher | Seção Taipei | |
dc.publisher | Chongqing | |
dc.relation | IEEE International Conference on Embedded and Real-Time Computing Systems and Applications, 20th | |
dc.rights | Copyright IEEE | |
dc.rights | restrictedAccess | |
dc.subject | Benchmark testing | |
dc.subject | Integrated circuits | |
dc.subject | Monitoring | |
dc.title | Operating system support to an online hardware-software co-design scheduler for heterogeneous multicore architectures | |
dc.type | Actas de congresos | |