dc.creatorBueno, Maikon Adiles Fernandez
dc.creatorHolanda, Jose Arnaldo Mascagni de
dc.creatorPereira, Erinaldo da Silva
dc.creatorMarques, Eduardo
dc.date.accessioned2015-03-20T13:31:24Z
dc.date.accessioned2018-07-04T17:04:24Z
dc.date.available2015-03-20T13:31:24Z
dc.date.available2018-07-04T17:04:24Z
dc.date.created2015-03-20T13:31:24Z
dc.date.issued2014-08-20
dc.identifierIEEE International Conference on Embedded and Real-Time Computing Systems and Applications, 20th, 2014, Chongqing.
dc.identifier9781479939541
dc.identifierhttp://www.producao.usp.br/handle/BDPI/48567
dc.identifierhttp://dx.doi.org/10.1109/RTCSA.2014.6910514
dc.identifier.urihttp://repositorioslatinoamericanos.uchile.cl/handle/2250/1644281
dc.description.abstractThis paper aims at designing and implementing a scheduler model for heterogeneous multiprocessor architectures based on software and hardware. As a proof of concept, the scheduler model was applied to the Linux operating system running on the SPARe Leon3 processor. In this sense, performance monitors have been implemented within the processors, which identify demands of processes in real-time. For each process, its demand is projected for the other processors in the architecture and then, it is performed a balancing to maximize the total system performance by distributing processes among processors. The Hungarian maximization algorithm, used in balancing scheduler was developed in hardware, and provides greater parallelism and performance in the execution of the algorithm. The scheduler has been validated through the parallel execution of several benchmarks, resulting in decreased execution times compared to the scheduler without the heterogeneity support.
dc.languageeng
dc.publisherChongqing University
dc.publisherIEEE Computer Society
dc.publisherSeção Taipei
dc.publisherChongqing
dc.relationIEEE International Conference on Embedded and Real-Time Computing Systems and Applications, 20th
dc.rightsCopyright IEEE
dc.rightsrestrictedAccess
dc.subjectBenchmark testing
dc.subjectIntegrated circuits
dc.subjectMonitoring
dc.titleOperating system support to an online hardware-software co-design scheduler for heterogeneous multicore architectures
dc.typeActas de congresos


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