Artículos de revistas
A transactional runtime system for the Cell/BE architecture
Registro en:
Journal Of Parallel And Distributed Computing. Academic Press Inc Elsevier Science, v. 72, n. 12, n. 1535, n. 1546, 2012.
0743-7315
WOS:000310669600001
10.1016/j.jpdc.2012.08.001
Autor
Baldassin, A
Goldstein, F
Azevedo, R
Institución
Resumen
Conselho Nacional de Desenvolvimento Científico e Tecnológico (CNPq) Fundação de Amparo à Pesquisa do Estado de São Paulo (FAPESP) Single-core architectures have hit the end of the road and industry and academia are currently exploiting new multicore design alternatives. In special, heterogeneous multicore architectures have attracted a lot of attention but developing applications for such architectures is not an easy task due to the lack of appropriate tools and programming models. We present the design of a runtime system for the Cell/BE architecture that works with memory transactions. Transactional programs are automatically instrumented by the compiler, shortening development time and avoiding synchronization mistakes usually present in lock-based approaches (such as deadlock). Experimental results conducted with a prototype implementation and the STAMP benchmark show good scalability for applications with moderate to low contention levels, and whose transactions are not too small. For those cases in which a small performance loss is admissible, we believe that the ease of programming provided by transactions greatly pays off. (C) 2012 Elsevier Inc. All rights reserved. 72 12 1535 1546 IBM Conselho Nacional de Desenvolvimento Científico e Tecnológico (CNPq) Fundação de Amparo à Pesquisa do Estado de São Paulo (FAPESP) Conselho Nacional de Desenvolvimento Científico e Tecnológico (CNPq) Fundação de Amparo à Pesquisa do Estado de São Paulo (FAPESP) FAPESP [2011/19373-6]