dc.creatorCarvalho, EJ
dc.creatorAlves, MAR
dc.creatorBraga, ES
dc.creatorCescato, L
dc.date2010
dc.dateDEC
dc.date2014-07-30T17:34:21Z
dc.date2015-11-26T17:54:41Z
dc.date2014-07-30T17:34:21Z
dc.date2015-11-26T17:54:41Z
dc.date.accessioned2018-03-29T00:38:23Z
dc.date.available2018-03-29T00:38:23Z
dc.identifierMicroelectronic Engineering. Elsevier Science Bv, v. 87, n. 12, n. 2544, n. 2548, 2010.
dc.identifier0167-9317
dc.identifierWOS:000282206100018
dc.identifier10.1016/j.mee.2010.06.046
dc.identifierhttp://www.repositorio.unicamp.br/jspui/handle/REPOSIP/66633
dc.identifierhttp://repositorio.unicamp.br/jspui/handle/REPOSIP/66633
dc.identifier.urihttp://repositorioslatinoamericanos.uchile.cl/handle/2250/1290831
dc.descriptionFundação de Amparo à Pesquisa do Estado de São Paulo (FAPESP)
dc.descriptionConselho Nacional de Desenvolvimento Científico e Tecnológico (CNPq)
dc.descriptionWe propose and demonstrate a simple and low cost process for the fabrication of large area arrays of nanometric silicon tips, for use as Field Emission Devices (FEDs). The process combines Interference Lithography (IL) with isotropic Reactive Ion Etching (RIE). Si tips with typical curvature radius of 20 nm and height of 900 nm were recorded with a periodicity of 1 mu m (density of 10(6) tips/mm(2)) covering a Silicon wafer of 2 in. The measurement of the electrical performance of the arrays demonstrates the feasibility of the association of these two techniques for recording Field Emission Tips. (C) 2010 Elsevier B.V. All rights reserved.
dc.description87
dc.description12
dc.description2544
dc.description2548
dc.descriptionFundação de Amparo à Pesquisa do Estado de São Paulo (FAPESP)
dc.descriptionFundação de Amparo à Pesquisa do Estado de Minas Gerais (FAPEMIG)
dc.descriptionConselho Nacional de Desenvolvimento Científico e Tecnológico (CNPq)
dc.descriptionFundação de Amparo à Pesquisa do Estado de São Paulo (FAPESP)
dc.descriptionConselho Nacional de Desenvolvimento Científico e Tecnológico (CNPq)
dc.languageen
dc.publisherElsevier Science Bv
dc.publisherAmsterdam
dc.publisherHolanda
dc.relationMicroelectronic Engineering
dc.relationMicroelectron. Eng.
dc.rightsfechado
dc.rightshttp://www.elsevier.com/about/open-access/open-access-policies/article-posting-policy
dc.sourceWeb of Science
dc.subjectInterference Lithography
dc.subjectReactive Ion Etching (RIE)
dc.subjectSilicon tips
dc.subjectField Emission Devices
dc.subjectEmission Display Applications
dc.subjectInterference Lithography
dc.subjectField
dc.subjectAttachment
dc.subjectEmitters
dc.titleFabrication and electrical performance of high-density arrays of nanometric silicon tips
dc.typeArtículos de revistas


Este ítem pertenece a la siguiente institución