dc.creatorAraujo, G
dc.creatorBarros, E
dc.creatorMelcher, E
dc.creatorAzevedo, R
dc.creatorda Silva, KRG
dc.creatorPrado, B
dc.creatorLima, ME
dc.date2005
dc.dateSEP
dc.date2014-11-16T15:28:07Z
dc.date2015-11-26T17:25:40Z
dc.date2014-11-16T15:28:07Z
dc.date2015-11-26T17:25:40Z
dc.date.accessioned2018-03-29T00:12:53Z
dc.date.available2018-03-29T00:12:53Z
dc.identifierDesign Automation For Embedded Systems. Springer, v. 10, n. 41700, n. 181, n. 202, 2005.
dc.identifier0929-5585
dc.identifierWOS:000240719900006
dc.identifier10.1007/s10617-006-9585-8
dc.identifierhttp://www.repositorio.unicamp.br/jspui/handle/REPOSIP/53877
dc.identifierhttp://www.repositorio.unicamp.br/handle/REPOSIP/53877
dc.identifierhttp://repositorio.unicamp.br/jspui/handle/REPOSIP/53877
dc.identifier.urihttp://repositorioslatinoamericanos.uchile.cl/handle/2250/1284368
dc.descriptionThe increasing complexity of modern System-on-Chip (SoC) platforms has revealed the need for methodologies that enable a rigorous engineering design process, based on a combination of Electronic System Level (ESL) description languages, and IP-core modeling and reuse. On the other hand, ESL modeling has faced designers with the same methodology problems encountered in the design of large computer programs. In this paper, we describe a SystemC-only IP-core design process, called IP PROCESS (IPP). IPP is inspired on two rigorous software engineering processes (RUP and XP), and on well-known hardware design standards (VSIA and RMM). The IPP Verification Methodology (IPV) is based on a careful refinement of the SystemC behavioral description towards RTL. Such approach enabled a continuous co-simulation against the behavioral reference model, while allowed for a SystemC-only environment. As a result, we have experienced a considerable reduction in design time and an improvement in early bug detection. The IPP process has been used by over 70 designers of the BrazilIP Network, a SystemC collaborative partnership, in the design of the Fenix system. An intermediate step in the Fenix design is a real-world multimedia platform called CINE-IP (demo available at http://www.brazilip.org.br/cine-ip), composed of MPEG4, MP3 decoders and an 8051 microcontroller. The application of the IPP methodology in the design of CINE-IP, and its impact in design productivity is thoroughly analyzed.
dc.description10
dc.description41700
dc.description181
dc.description202
dc.languageen
dc.publisherSpringer
dc.publisherDordrecht
dc.publisherHolanda
dc.relationDesign Automation For Embedded Systems
dc.relationDes. Autom. Embed. Syst.
dc.rightsfechado
dc.rightshttp://www.springer.com/open+access/authors+rights?SGWID=0-176704-12-683201-0
dc.sourceWeb of Science
dc.subjecta based on SystemC design methodology
dc.subjectsystem design in SystemC
dc.subjectengineering design process
dc.subjectfunctional verification
dc.subjectIP-core modeling
dc.subjectFPGA prototyping
dc.subjectmultimedia platform
dc.titleA SystemC-only design methodology and the CINE-IP multimedia platform
dc.typeArtículos de revistas


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