An iterative cell scheduling algorithm for ATM input-queued switch with service class priority

dc.creatorMotoyama, S
dc.creatorOno, LM
dc.creatorMavigno, MC
dc.date1999
dc.dateNOV
dc.date2014-12-02T16:25:11Z
dc.date2015-11-26T17:21:10Z
dc.date2014-12-02T16:25:11Z
dc.date2015-11-26T17:21:10Z
dc.date.accessioned2018-03-29T00:08:42Z
dc.date.available2018-03-29T00:08:42Z
dc.identifierIeee Communications Letters. Ieee-inst Electrical Electronics Engineers Inc, v. 3, n. 11, n. 323, n. 325, 1999.
dc.identifier1089-7798
dc.identifierWOS:000083764400007
dc.identifier10.1109/4234.803470
dc.identifierhttp://www.repositorio.unicamp.br/jspui/handle/REPOSIP/54470
dc.identifierhttp://www.repositorio.unicamp.br/handle/REPOSIP/54470
dc.identifierhttp://repositorio.unicamp.br/jspui/handle/REPOSIP/54470
dc.identifier.urihttp://repositorioslatinoamericanos.uchile.cl/handle/2250/1283305
dc.descriptionAn iterative cell scheduling algorithm for asynchronous transfer mode (ATM) input-queued switch with service class priority is proposed in this paper. At inputs of the switch the VC's or VP's are discriminated into classes of services and in each class an iterative round robin matching scheduler is provided. A performance analysis is carried out by simulation and the results show a very promising ATM switch for the proposed algorithm.
dc.description3
dc.description11
dc.description323
dc.description325
dc.languageen
dc.publisherIeee-inst Electrical Electronics Engineers Inc
dc.publisherNew York
dc.publisherEUA
dc.relationIeee Communications Letters
dc.relationIEEE Commun. Lett.
dc.rightsfechado
dc.rightshttp://www.ieee.org/publications_standards/publications/rights/rights_policies.html
dc.sourceWeb of Science
dc.subjectATM
dc.subjectcell scheduling
dc.subjectinput-queued switch
dc.subjectservice class priority
dc.titleAn iterative cell scheduling algorithm for ATM input-queued switch with service class priority
dc.typeArtículos de revistas


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