dc.creatorDIAS, JAS
dc.creatorDEMORAES, WB
dc.date1992
dc.dateDEC 3
dc.date2014-12-16T11:33:25Z
dc.date2015-11-26T16:58:41Z
dc.date2014-12-16T11:33:25Z
dc.date2015-11-26T16:58:41Z
dc.date.accessioned2018-03-28T23:46:19Z
dc.date.available2018-03-28T23:46:19Z
dc.identifierElectronics Letters. Iee-inst Elec Eng, v. 28, n. 25, n. 2350, n. 2351, 1992.
dc.identifier0013-5194
dc.identifierWOS:A1992KD32500058
dc.identifierhttp://www.repositorio.unicamp.br/jspui/handle/REPOSIP/78739
dc.identifierhttp://www.repositorio.unicamp.br/handle/REPOSIP/78739
dc.identifierhttp://repositorio.unicamp.br/jspui/handle/REPOSIP/78739
dc.identifier.urihttp://repositorioslatinoamericanos.uchile.cl/handle/2250/1277991
dc.descriptionA simple technique which employs a bias current with a positive nonlinear temperature coefficient is used to compensate for the temperature variations of the transconductance in a CMOS linearised differential pair. Simulated results show that a temperature drift of less than 100 ppm/degrees-C can be obtained in the 0-100-degrees-C range.
dc.description28
dc.description25
dc.description2350
dc.description2351
dc.languageen
dc.publisherIee-inst Elec Eng
dc.publisherHertford
dc.publisherInglaterra
dc.relationElectronics Letters
dc.relationElectron. Lett.
dc.rightsfechado
dc.sourceWeb of Science
dc.subjectTRANSCONDUCTORS
dc.subjectINTEGRATED CIRCUITS
dc.subjectMos
dc.titleCMOS TEMPERATURE-STABLE LINEARIZED DIFFERENTIAL PAIR
dc.typeArtículos de revistas


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