Isamap: Instruction Mapping Driven By Dynamic Binary Translation

dc.creatorSouza M.
dc.creatorNicacio D.
dc.creatorAraujo G.
dc.date2012
dc.date2015-06-26T20:29:38Z
dc.date2015-11-26T14:26:13Z
dc.date2015-06-26T20:29:38Z
dc.date2015-11-26T14:26:13Z
dc.date.accessioned2018-03-28T21:29:12Z
dc.date.available2018-03-28T21:29:12Z
dc.identifier9783642243219
dc.identifierLecture Notes In Computer Science (including Subseries Lecture Notes In Artificial Intelligence And Lecture Notes In Bioinformatics). , v. 6161 LNCS, n. , p. 117 - 138, 2012.
dc.identifier3029743
dc.identifier10.1007/978-3-642-24322-6_11
dc.identifierhttp://www.scopus.com/inward/record.url?eid=2-s2.0-84857744001&partnerID=40&md5=2a48173fc9caebf31e53b82dfc21d5f6
dc.identifierhttp://www.repositorio.unicamp.br/handle/REPOSIP/97107
dc.identifierhttp://repositorio.unicamp.br/jspui/handle/REPOSIP/97107
dc.identifier2-s2.0-84857744001
dc.identifier.urihttp://repositorioslatinoamericanos.uchile.cl/handle/2250/1246020
dc.descriptionDynamic Binary Translation (DBT) techniques have been largely used in the migration of legacy code and in the transparent execution of programs across different architectures. They have also been used in dynamic optimizing compilers, to collect runtime information so as to improve code quality. In many cases, DBT translation mechanism misses important low-level mapping opportunities available at the source/target ISAs. Hot code performance has been shown to be central to the overall program performance, as different instruction mappings can account for high performance gains. Hence, DBT techniques that provide efficient instruction mapping at the ISA level has the potential to considerably improve performance. This paper proposes ISAMAP, a flexible instruction mapping driven by dynamic binary translation. Its mapping mechanism, provides a fast translation between ISAs, under an easy-to-use description. At its current state, ISAMAP is capable of translating 32-bit PowerPC code to 32-bit x86 and to perform local optimizations on the resulting x86 code. Our experimental results show that ISAMAP is capable of executing PowerPC code on an x86 host faster than the processor emulator QEMU, achieving speedups of up to 3.16x for SPEC CPU2000 programs. © 2011 Springer-Verlag.
dc.description6161 LNCS
dc.description
dc.description117
dc.description138
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dc.languageen
dc.publisher
dc.relationLecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)
dc.rightsfechado
dc.sourceScopus
dc.titleIsamap: Instruction Mapping Driven By Dynamic Binary Translation
dc.typeActas de congresos


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