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Impact of designer knowledge in the interactive evolutionary optimisation of analogue CMOS ICs by using iMTGSPICE
(2019)
© The Institution of Engineering and Technology 2019.This Letter describes an innovative interactive evolutionary computational tool to optimise robust analogue complementary metal-oxide-semiconductor (CMOS) integrated ...
Impact of designer knowledge in the interactive evolutionary optimisation of analogue CMOS ICs by using iMTGSPICE
(2019)
© The Institution of Engineering and Technology 2019.This Letter describes an innovative interactive evolutionary computational tool to optimise robust analogue complementary metal-oxide-semiconductor (CMOS) integrated ...
Methodology to optimize and reduce the total gate area of robust operational transconductance amplifiers by using diamond layout style for MOSFETs
(2020-11-22)
This paper describes a pioneering methodology to design, optimize, and reduce the total gate area of robust Operational
Transconductance Amplifiers (OTAs). The Single-Ended Single-Stage (SESS) OTA has been chosen to ...