Buscar

Mostrando ítems 1-2 de 2

Digital Performance of OCTO Layout Style on SOI MOSFET at High Temperature Environment

GALEMBECK, E. H. S.; FLANDRE, D.; RENAUX, C.; Salvador Gimenez (2021)

Digital Performance of OCTO Layout Style on SOI MOSFET at High Temperature Environment

GALEMBECK, E. H. S.; FLANDRE, D.; RENAUX, C.; Salvador Gimenez (2019-08-25)

This present paper performs an experimental comparative study of the main digital parameters and figures of merit of the octagonal layout style for the planar Silicon-On-Insulator (SOI) Metal-Oxide-Semiconductor (MOS) Field ...