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Design of the Analog Transmitter Module in 130 nm CMOS technology
(ITESO, 2016-07)
Design of the Analog Transmitter Module in 130 nm CMOS technology
(ITESO, 2016-07)
Design of the Analog Transmitter Module in 130 nm CMOS technology
(ITESO, 2016-07)
An accurate low-voltage analog memory-cell with built-in multiplication
(2001-01-01)
A CMOS memory-cell for dynamic storage of analog data and suitable for LVLP applications is proposed. Information is memorized as the gate-voltage of input-transistor of a gain-boosting triode-transconductor. The enhanced ...
An accurate low-voltage analog memory-cell with built-in multiplication
(2001-01-01)
A CMOS memory-cell for dynamic storage of analog data and suitable for LVLP applications is proposed. Information is memorized as the gate-voltage of input-transistor of a gain-boosting triode-transconductor. The enhanced ...
A methodology for automated design and implementation of complex analog and digital CMOS integrated circuits applying a genetic algorithm and a CAD tool for multiobjective optimization.
(Instituto Tecnológico de Costa Rica, 2014)
This dissertation proposes an automated methodology to design and optimize electronic integrated circuits, something that could be called simulation-driven optimization. The concept of Pareto optimality or the so called ...
Design of bias circuit for charge pump in 130nm BiCMOS technology
(ITESO, 2018-08)