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A Reorder Buffer Design for High Performance Processors
(Revista Computación y Sistemas; Vol. 16 No. 1, 2012-03-15)
Abstract. Modern reorder buffers (ROBs) were
conceived to improve processor performance by
allowing instruction execution out of the original
program order and run ahead of sequential instruction
code exploiting existing ...
Co-design of Compiler and Hardware Techniques to Reduce Program Code Size on a VLIW Processor
(Centro Latinoamericano de Estudios en Informática, 2012)
Ethanol and glycerin processor systems coupled to solid oxide fuel cells (SOFCs): optimal operation and heat exchangers network synthesis
(Elsevier, 2013-06)
This paper is aimed at presenting a methodology for the simultaneous synthesis of solid oxide fuel cell (SOFC) based systems and their associated heat exchangers network (HEN). The optimization model is formulated as a ...
Ethanol and glycerin processor systems coupled to solid oxide fuel cells (SOFC). Optimal operation and heat exchangers network synthesis
(Pergamon-elsevier Science Ltd, 2013-04-24)
This paper is aimed at presenting a methodology for the simultaneous synthesis of solid oxide fuel cell (SOFC) based systems and their associated heat exchangers network (HEN). The optimization model is formulated as a ...
MAKING AND DISSOLVING THE SOCIOTECHNICAL NETWORK OF THE FACIL WORD PROCESSOR: ELEMENTS FOR AN ETHNOGRAPHY OF TECHNOLOGY
(Univ Federal Do Rio JaneiroRio De JaneiroBrasil, 2010)
Towards a java bytecodes compiler for nios II soft-core processor
(2009-11-19)
Reconfigurable computing is one of the most recent research topics in computer science. The Altera - Nios II soft-core processor can be included in a large set of reconfigurable architectures, especially because it is ...