dc.creatorBastías Barraza, Ignacio Alberto
dc.creatorBihary, S.
dc.creatorRoy, S.
dc.date.accessioned2022-05-16T20:30:52Z
dc.date.available2022-05-16T20:30:52Z
dc.date.created2022-05-16T20:30:52Z
dc.date.issued2011
dc.identifier10.1109/APSEC.2011.49
dc.identifier1530-1362
dc.identifier9781457721991
dc.identifier1530-1362
dc.identifierhttps://ieeexplore.ieee.org/stamp/stamp.jsp?arnumber=6130675
dc.identifierhttps://doi.org/10.1109/APSEC.2011.49
dc.identifierhttps://repositorio.uc.cl/handle/11534/64015
dc.description.abstractWe chalk out a procedure for automatically analyzing BPM processes modeled using an in-house Infosys requirements modeling tool, called InFlux. By this analysis, we are able to check the processes for syntactical errors as well as errors due lack of soundness. In the first step of the analysis these processes are checked for syntactical errors using simple graph-search techniques. If these processes do not contain any such error, they are subjected to soundness analysis ( i.e., checking for absence of deadlock and lack of synchronization) using two different approaches with the business process verification tool Woflan and the Petri net model checker LoLA. Depending on the existence of a cycle the models are either fed into Woflan or LoLA. We report our experience with the occurrence of errors in InFlux processes.
dc.languageen
dc.publisherIEEE
dc.relationAsia-Pacific Software Engineering Conference (18° : 2011 : Ciudad Ho Chi Minh, Vietnam)
dc.rightsacceso restringido
dc.subjectBusiness
dc.subjectUnified modeling language
dc.subjectProcess control
dc.subjectSynchronization
dc.subjectAnalytical models
dc.subjectSystem recovery
dc.subjectLogic gates
dc.titleAn Automated Analysis of Errors for BPM Processes Modeled Using an In-house Infosys Tool
dc.typecomunicación de congreso


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