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Design of a reconfigurable pseudorandom number generator for use in intelligent systems
(Elsevier B.V., 2011-05-01)
This paper deals with the design of a network-on-chip reconfigurable pseudorandom number generation unit that can map and execute meta-heuristic algorithms in hardware. The unit can be configured to implement one of the ...
Algoritmo de prefetching de dados temporizado para sistemas multiprocessadores baseados em NOC
(Universidade Federal de PernambucoUFPEBrasilPrograma de Pos Graduacao em Ciencia da Computacao, 2016)
Design of a reconfigurable pseudorandom number generator for use in intelligent systems
(Elsevier B.V., 2014)
Numerical simulation of electrokinetic flow in microfluidic chips
(Asociación Argentina de Mecánica Computacional, 2006-12)
Microfluidic chips are miniaturized analytical devices used in chemical, biological and medical applications. In most cases, fluids are conducted through microchannels by applying electric potentials and/or pressure ...
Desing of a Network-On-Chip platform for MPSoCS using TLM 2.0 standard and FPGA implementation
(UniandesMaestría en Ingeniería Electrónica y de ComputadoresFacultad de IngenieríaDepartamento de Ingeniería Eléctrica y Electrónica, 2011)
Complex systems that include a great variety of modules inside the same dice require higher level design techniques that allow obtaining accurate models suitable to test hardware as well as software at early stages; ...
Monitoramento da entrega de pacotes em redes intra-chip
(Araranguá, SC, 2018)