This study presents different layouts techniques (serpentine, concentric, interdigitated) applied to a differential amplifier designed in commercial technology CMOS (0.6 μm). It was observed that serpentine technique improves by 6 to 7 electrical parameters, where area was reduced (64%) and power consumption diminishes until a 57% with respect to conventional technique. Thus designer can optimally use different abstraction levels during integrated circuits (IC) design, by applying the best layout technique towards efficient systems.