In this article the contribution of the digital ΣΔ modulator in fractional frequency synthesizers is explored. Due to the circuit’s non linear behavior, the spur tones generated by the digital ΣΔ modulation degrade the synthesizer’s phase noise even in regions where the charge pump noise is dominant. A new method to dither digital MASH ΣΔ modulators for fractional frequency synthesizers is proposed. The method barely increases the circuit complexity and has the same performance as more cumbersome architectures. Also, a new design consideration to linearize the voltage control oscillator is proposed. Experimental results are obtained in an on-chip fractional synthesizer manufactured in CMOS technology.