info:eu-repo/semantics/masterThesis
FPGA-based compressed sensing reconstruction of sparse signals
Autor
HECTOR DANIEL RICO ANILES
Resumen
Compressed sensing is a recently proposed technique aiming to acquire a signal with
sparse or compressible representation in some domain, using a number of samples under
the limit established by the Nyquist theorem. The challenge is to recover the sensed
signal solving an underdetermined linear system. Several techniques such as the l1 minimization,
Greedy and combinatorial algorithms can be used for that purpose. Greedy
algorithms have been found to be more suitable in hardware solutions, however they
rely on efficient matrix inversion techniques in order to solve the underdetermined linear
systems involved. In this work, a FPGA-based Greedy algorithm architecture with a
Chebyshev-type method to solve matrix inversion problem is presented. The architecture
was developed for Xilinx Virtex 4 XC4VSX25, Xilinx Spartan 6 XC6SLX45, Altera
Cyclone IV EP4CGX150DF31C7 and Altera Cyclone II EP2C35F672C6 FPGAs. The
described architecture represents a low-cost and generic solution, robust to changes in
word length and signal size. Besides, a MATLAB Graphical User Interface is developed
for compressed sensing theory exploration focused on matrix and transform test.
MATLAB GUI uses the Compressed Sampling Matching Pursuit algorithm to recover
the sensed signal; reconstruction can easily be extended to other compressed sensing
algorithms.
Materias
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