dc.creatorVourkas, Ioannis
dc.creatorGómez Luna, Jorge Antonio
dc.creatorAbusleme Hoffman, Ángel Christian
dc.creatorVasileiadis, Nikolaos
dc.creatorSirakoulis, Georgios C.
dc.creatorRubio, Antonio
dc.date.accessioned2022-05-11T20:26:38Z
dc.date.available2022-05-11T20:26:38Z
dc.date.created2022-05-11T20:26:38Z
dc.date.issued2017
dc.identifier10.1109/LASCAS.2017.7948043
dc.identifier978-1-5090-5859-4
dc.identifier2473-4667
dc.identifier9781509058600
dc.identifierhttps://ieeexplore.ieee.org/stamp/stamp.jsp?arnumber=7948043
dc.identifierhttps://doi.org/10.1109/LASCAS.2017.7948043
dc.identifierhttps://repositorio.uc.cl/handle/11534/63806
dc.description.abstractThe maximum exploitation of the favorable properties and the analog nature of memristor technology in future nonvolatile resistive memories, requires accurate multi-level programming. In this direction, we explore the voltage divider (VD) approach for highly controllable multi-state SET memristor tuning. We present the theoretical basis of operation, the main advantages and weaknesses. We finally propose an improved closed-loop VD SET scheme to tackle the variability effect and achieve <;1% tuning precision, on average 3x faster than another accurate tuning algorithm of the recent literature.
dc.languageen
dc.publisherIEEE
dc.relationLatin American Symposium on Circuits & Systems (LASCAS) (8° : 2017 : Bariloche, Argentina)
dc.rightsacceso restringido
dc.subjectTuning
dc.subjectMemristors
dc.subjectSwitches
dc.subjectProgramming
dc.subjectResistance
dc.subjectThreshold voltage
dc.subjectSimulation
dc.titleExploring the voltage divider approach for accurate memristor state tuning
dc.typecomunicación de congreso


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