info:eu-repo/semantics/article
Minimization of the line resistance impact on memdiode-based simulations of multilayer perceptron arrays applied to pattern recognition
Fecha
2021-03Registro en:
Aguirre, Fernando Leonel; Gomez, Nicolás M.; Pazos, Sebastián Matías; Palumbo, Félix Roberto Mario; Suñé, Jordi; et al.; Minimization of the line resistance impact on memdiode-based simulations of multilayer perceptron arrays applied to pattern recognition; MDPI AG; Journal of Low Power Electronics and Applications; 11; 1; 3-2021; 1-18
2079-9268
CONICET Digital
CONICET
Autor
Aguirre, Fernando Leonel
Gomez, Nicolás M.
Pazos, Sebastián Matías
Palumbo, Félix Roberto Mario
Suñé, Jordi
Miranda, Enrique
Resumen
In this paper, we extend the application of the Quasi-Static Memdiode model to the real-istic SPICE simulation of memristor-based single (SLPs) and multilayer perceptrons (MLPs) in-tended for large dataset pattern recognition. By considering ex-situ training and the classification of the hand-written characters of the MNIST database, we evaluate the degradation of the inference accuracy due to the interconnection resistances for MLPs involving up to three hidden neural layers. Two approaches to reduce the impact of the line resistance are considered and implemented in our simulations, they are the inclusion of an iterative calibration algorithm and the partitioning of the synaptic layers into smaller blocks. The obtained results indicate that MLPs are more sensitive to the line resistance effect than SLPs and that partitioning is the most effective way to minimize the impact of high line resistance values.