info:eu-repo/semantics/article
System Margining Surrogate-Based Optimization in Post-Silicon Validation
Fecha
2017-09Registro en:
F. E. Rangel-Patiño, J. L. Chávez-Hurtado, A. Viveros-Wacher, J. E. Rayas-Sánchez, and N. Hakim, “System margining surrogate-based optimization in post-silicon validation,” IEEE Trans. Microwave Theory Techn., vol. 65, no. 9, pp. 3109-3115, Sep. 2017. DOI: 10.1109/TMTT.2017.2701368
0018-9480
Autor
Rangel-Patiño, Francisco E.
Chávez-Hurtado, José L.
Viveros-Wacher, Andrés
Rayas-Sánchez, José E.