High-Frequency Electronic Design Optimization Using Simulated Annealing

Alejos-Jiménez, Jesús R.

info:eu-repo/semantics/masterThesis

Date

2017-11

Registration in:

Alejos-Jiménez, J. R. (2017). High-Frequency Electronic Design Optimization Using Simulated Annealing. Trabajo de obtención de grado, Maestría en Diseño Electrónico. Tlaquepaque, Jalisco: ITESO.

http://hdl.handle.net/11117/5114

Author

Alejos-Jiménez, Jesús R.

Institutions

Instituto Tecnológico y de Estudios Superiores de Occidente (México)

Subjects

High-frequency Electronic Design

Simulated Annealing

Optimization

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