Actas de congresos
Zero Temperature Coefficient behavior for advanced MOSFETs
Fecha
2017-07-31Registro en:
2016 13th IEEE International Conference on Solid-State and Integrated Circuit Technology, ICSICT 2016 - Proceedings, p. 785-788.
10.1109/ICSICT.2016.7999041
2-s2.0-85028643147
0496909595465696
0000-0002-0886-7798
Autor
Universidade de São Paulo (USP)
Universidade Estadual Paulista (Unesp)
Imec
KULeuven
Institución
Resumen
In this work the Zero Temperature Coefficient (ZTC) is investigated experimentally using state-of-the-art industrial technologies like Ultra-Thin Body and Buried Oxide (UTBB) and triple-gate FinFETs (irradiated and/or strained devices), both fabricated on Silicon On Insulator (SOI) wafers. A simple analytical model to analyze the behavior of the gate-source voltage at the Zero Temperature Coefficient point (VZTC) is validated for these advanced devices. Although simple, the model predictions have shown good agreement with the experimental results and can be useful for low-power low-voltage analog circuit designers, where biasing at/near the ZTC point should result in low thermal drift of the circuit operation.