Actas de congresos
A configurable approach to circuit simulation
Fecha
2000-01-01Registro en:
Proceedings of the International Conference on Parallel and Distributed Processing Techniques and Applications, Vols I-v. Athens: C S R E A Press, p. 1539-1544, 2000.
WOS:000167676300211
2098623262892719
0000-0003-1086-3312
Autor
Universidade Estadual Paulista (Unesp)
Institución
Resumen
This paper presents a configurable architecture which was designed to aid in the simulation of ULSI circuits at the transistor level. Elsewhere [1] this architecture was shown to be able to run such simulations several times as fast as standard circuit simulators such as SPICES. In this paper, after describing the overall idea and the the architecture of the system as a whole, I concentrate on the description of the architecture of the processing elements of the computing array.