Artículos de revistas
Instruction Scheduling Based on Subgraph Isomorphism for a High Performance Computer Processor
Registro en:
Journal Of Universal Computer Science. Graz Univ Technolgoy, Inst Information Systems Computer Media-iicm, v. 14, n. 21, n. 3465, n. 3480, 2008.
0948-695X
WOS:000264754900005
Autor
Santos, R
Azevedo, R
Araujo, G
Institución
Resumen
This paper(1) presents an instruction scheduling algorithm based on the Subgraph Isomorphism Problem. Given a Directed Acyclic Graph (DAG) G(1), our algorithm looks for a subgraph G'(2) in a base graph G(2), such that G'(2) is isomorphic to G(1). The base graph G(2) represents the arrangement of the processing elements of a high performance computer architecture named 2D-VLIW and G'(2) is the set of those processing elements required to execute operations in G(1). We have compared this algorithm with a greedy list scheduling strategy using programs of the SPEC and MediaBench suites. In our experiments, the average Operation Per Cycle (OPC) and Operations Per Instruction (OPI) achieved by our algorithm are 1.45 and 1.40 times better than the OPC and OPI obtained by the list scheduling algorithm. 12th Brazilian Symposium on Programming Languages : 2008 : Fortaleza, BRAZIL : 14 21 3465 3480