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Formal Verification of Distributed System Using an Executable C Model
(2016)
Formal verification means to rigorously explore the correctness of system designs expressed as mathematical models, most likely with the assistance of modern computers. Original approaches were to model and express a ...
A TLA+ Formal Specification and Verification of a New Real-Time Communication Protocol
(2009)
We describe the formal specification and verification of a new fault-tolerant real-time communication protocol,
called DoRiS, which is designed for supporting distributed real-time systems that use a shared
high-bandwidth ...
Selection of formal verification heuristics for parallel execution
(International Journal on Software Tools for Technology Transfer, 2018)
Exploring parallel formal verification of BIG-DATA systems
(Universidad de Palermo, 2021)