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Differential mixer with NMOS/PMOS stack at switching stage
(2012-12-14)
This paper proposes a novel differential mixer topology. The traditional stage of switching is replaced by a stack of NMOS and PMOS transistors combined. A design is given of a 900 MHz down-conversion mixer using a 0.35 ...
Design of a CMOS voltage reference using current-model approach
(2011-05-20)
A voltage reference with low sensibility to temperature and power-supply that can generate flexible reference values (from milivolts to several volts) is proposed. Designed for AMS 0.35μm CMOS process, the circuit provides ...
Temporal Noise Analysis and Measurements of CMOS Active Pixel Sensor Operating in Time Domain
(Ieee, 2013-01-01)
Image sensors in standard CMOS technology are increasing used for consumer, industrial and scientific applications due to their low cost, high level of integration and low power consumption. Further, image sensors in ...
Temporal noise analysis and measurements of CMOS active pixel sensor operating in time domain
(2013-01-01)
Image sensors in standard CMOS technology are increasing used for consumer, industrial and scientific applications due to their low cost, high level of integration and low power consumption. Further, image sensors in ...
An analog implementation of radial basis neural networks (RBNN) using BiCMOS technology
(2001-12-01)
This paper describes a analog implementation of radial basis neural networks (RBNN) in BiCMOS technology. The RBNN uses a gaussian function obtained through the characteristic of the bipolar differential pair. The gaussian ...
Charge-Pump Circuit in 65nm CMOS for Neural Stimulation on Deep-Brain Stimulation
(2021-01-01)
Deep-Brain Stimulation (DBS) is an emerging area to improve the life of patients with brain deceases and one with the most dynamic research towards implantable devices. This paper presents an electronic circuit to generate ...
A Gm-C bump equalizer for low-voltage low-power applications
(2004-09-07)
A low-voltage low-power 2nd-order CMOS pseudo-differential bump-equalizer is presented. Its topology comprises a bandpass section with adjustable center frequency and quality factor, together with a programmable current ...
A multisampling time-domain CMOS imager with synchronous readout circuit
(2007-12-01)
A novel multisampling time-domain architecture for CMOS imagers with synchronous readout and wide dynamic range is proposed. The architecture was implemented in a prototype of imager with 32x32 pixel array fabricated in ...
A low-voltage programmable-gain CMOS amplifier with very-low temperature-drift
(2001-01-01)
A new topology for a LVLP variable-gain CMOS amplifier is presented. Input- and load-stage are built around triode-transconductors so that voltage-gain is fully defined by a linear relationship involving only device-geometries ...
A logarithmic CMOS image sensor with wide output voltage swing range
(Ieee, 2017-01-01)
This paper presents logarithmic CMOS image sensor with wide output voltage swing range. Wide output voltage swing range is achieved by increasing the number of transistors connected as diodes of logarithmic CMOS image ...