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SOI technology characterization using SOI-MOS capacitor
(2005)
In this paper a set of simple methods is presented, to determine the main parameters of the silicon on insulator technology, using a thin film SOI-MOS capacitor. Methods to obtain the effective substrate doping concentration, ...
Back gate bias influence on SOI Ω-gate nanowire down to 10 nm width
(2017-01-03)
We investigate for the first time the influence of the back gate bias (VB) in the main digital and analog parameters on Silicon-On-Insulator (SOI) omega-gate nanowire devices down to 10 nm width (W). For wider channel, it ...
Back gate bias influence on SOI Omega-gate nanowire down to 10 nm width
(Ieee, 2016-01-01)
We investigate for the first time the influence of the back gate bias (V-B) in the main digital and analog parameters on Silicon-On-Insulator (SOI) omega-gate nanowire devices down to 10 nm width (W). For wider channel, ...
Estudo do efeito de autoaquecimento em transistores com canal por medida pulsada
(Centro Universitário da FEI, São Bernardo do Campo, 2012)
A tecnologia do transistor MOS com Silício sobre Isolante (SOI) tem aberto oportunidade para inovação, aumento de desempenho e redução do tamanho do dispositivo, que a
tecnologia CMOS "bulk" tem dificuldade para alcançará. ...
Estudo do efeito de autoaquecimento em transistores com canal por medida pulsada
(Centro Universitário da FEI, São Bernardo do Campo, 2012)
A tecnologia do transistor MOS com Silício sobre Isolante (SOI) tem aberto oportunidade para inovação, aumento de desempenho e redução do tamanho do dispositivo, que a
tecnologia CMOS "bulk" tem dificuldade para alcançará. ...
Intrinsic voltage gain and unit-gain frequency of omega-gate nanowire SOI MOSFETs
(Ieee, 2019-01-01)
This paper shows the influence of channel width (W-NW) and channel length (L) on intrinsic voltage gain (A(V)) and on unit-gain frequency (f(t)) of omega-gate nanowire SOI MOSFET. The f(t) is calculated taking into ...
Application of UTBB (SOI)-S-BE Tunnel-FET as a Dual-Technology Transistor
(Ieee, 2019-01-01)
In this work we propose for the first time the use of the recently introduced UTBB (SOI)-S-BE TFET (Ultra-Thin Body and Box Back Enhanced Silicon-On-Insulator Tunnel-FET) operating as a MOSFET device only by changing its ...
Influence of spacer materials on underlapped and self-aligned UTBB SOI nMOSFET
(2016-11-02)
In this paper the influence of spacer material (S13N4, S1O2 or vacuum) on Ultra Thin Body and Buried Oxide (UTBB) SOI nMOSFET for underlapped and self-aligned drain engineering devices are studied by bi-dimensional numerical ...
Application of UTBBBE SOI tunnel-FET as a dual-technology transistor
(2019-08-01)
In this work we propose for the first time the use of the recently introduced UTBBBE SOI TFET (Ultra-Thin Body and Box Back Enhanced Silicon-On-Insulator Tunnel-FET) operating as a MOSFET device only by changing its bias ...